VHDL, CPLD's and Schematic capture
CPLD's are getting really big there days. So big that people are putting
enture cpu's in them. This motivates people (like me) to try and create
some small devices to do specialized work.
Stage 1, synthesis. Cypress sells
their Warp software pretty cheap ($99) which has a resonable VHDL
compiler and simulator and fitting for (of course) all of their parts.
The simulator is pretty simple but reasonable for small jobs. It
certainly can handle my USB decode project with ease.
Stage 2, schematic capture. If you want to build a small project
using a CPLD you might think, "well jee, I only want to make a small
4x6 inch PC board, with say, 4 layers, so how hard could it be?".
I found that it was not easy to find an inexpensive package to do this.
(if you know of one, please send me email about it).
Most packages seem to be too simple and only offer 2 layers. Other packages
have 'demo modes' which limit the number of pins to say 100 (which is not
very useful for evaluation if you want to route a part with 192 pins). The
packages which allow 4 layers are over $500.
I may have to break down and spend $400 on CircuitMaker.
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